\doxysubsubsubsection{UART Parity }
\hypertarget{group___u_a_r_t___parity}{}\label{group___u_a_r_t___parity}\index{UART Parity@{UART Parity}}
\doxysubsubsubsubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___parity_ga270dea6e1a92dd83fe58802450bdd60c}{UART\+\_\+\+PARITY\+\_\+\+NONE}}~0x00000000U
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___parity_ga063b14ac42ef9e8f4246c17a586b14eb}{UART\+\_\+\+PARITY\+\_\+\+EVEN}}~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\+\_\+\+CR1\+\_\+\+PCE}}
\item 
\#define \mbox{\hyperlink{group___u_a_r_t___parity_ga229615e64964f68f7a856ea6ffea359e}{UART\+\_\+\+PARITY\+\_\+\+ODD}}~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\+\_\+\+CR1\+\_\+\+PCE}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\+\_\+\+CR1\+\_\+\+PS}})
\end{DoxyCompactItemize}


\doxysubsubsubsubsection{Detailed Description}


\label{doc-define-members}
\Hypertarget{group___u_a_r_t___parity_doc-define-members}
\doxysubsubsubsubsection{Macro Definition Documentation}
\Hypertarget{group___u_a_r_t___parity_ga063b14ac42ef9e8f4246c17a586b14eb}\index{UART Parity@{UART Parity}!UART\_PARITY\_EVEN@{UART\_PARITY\_EVEN}}
\index{UART\_PARITY\_EVEN@{UART\_PARITY\_EVEN}!UART Parity@{UART Parity}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_PARITY\_EVEN}{UART\_PARITY\_EVEN}}
{\footnotesize\ttfamily \label{group___u_a_r_t___parity_ga063b14ac42ef9e8f4246c17a586b14eb} 
\#define UART\+\_\+\+PARITY\+\_\+\+EVEN~\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\+\_\+\+CR1\+\_\+\+PCE}}}

Even parity \Hypertarget{group___u_a_r_t___parity_ga270dea6e1a92dd83fe58802450bdd60c}\index{UART Parity@{UART Parity}!UART\_PARITY\_NONE@{UART\_PARITY\_NONE}}
\index{UART\_PARITY\_NONE@{UART\_PARITY\_NONE}!UART Parity@{UART Parity}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_PARITY\_NONE}{UART\_PARITY\_NONE}}
{\footnotesize\ttfamily \label{group___u_a_r_t___parity_ga270dea6e1a92dd83fe58802450bdd60c} 
\#define UART\+\_\+\+PARITY\+\_\+\+NONE~0x00000000U}

No parity \Hypertarget{group___u_a_r_t___parity_ga229615e64964f68f7a856ea6ffea359e}\index{UART Parity@{UART Parity}!UART\_PARITY\_ODD@{UART\_PARITY\_ODD}}
\index{UART\_PARITY\_ODD@{UART\_PARITY\_ODD}!UART Parity@{UART Parity}}
\doxysubsubsubsubsubsection{\texorpdfstring{UART\_PARITY\_ODD}{UART\_PARITY\_ODD}}
{\footnotesize\ttfamily \label{group___u_a_r_t___parity_ga229615e64964f68f7a856ea6ffea359e} 
\#define UART\+\_\+\+PARITY\+\_\+\+ODD~(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga60f8fcf084f9a8514efafb617c70b074}{USART\+\_\+\+CR1\+\_\+\+PCE}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_ga2e159d36ab2c93a2c1942df60e9eebbe}{USART\+\_\+\+CR1\+\_\+\+PS}})}

Odd parity 